Author Type

Graduate Student

Date of Award

2003

Document Type

Thesis

Publication Status

Version of Record

Submission Date

October 2026

Thesis/Dissertation Advisor [Chair]

Pandya, Abhijit S.

Abstract

There is a mushrooming demand for battery operated applications that require intensive computation in portable environments. This has motivated the research and development of techniques that reduce power in CMOS digital circuits while maintaining their computational throughput. The two essentials to achieve a low power design are miniaturization and long battery life. Lowering the supply voltage is one of the most effective ways to achieve low-power performance as power dissipation in digital CMOS circuits is approximately proportional to the square of supply voltage. The basic idea behind this thesis is that it proposes new designs of transfer gate based logical circuits, which use lower supply voltage and less number of transistors than the conventional designs. This work evaluates the obtained results from the proposed designs of the low-power ALU with that from the standard CMOS, other low power designs namely, Wang's XOR, XNOR and Inverter based gates. It was observed that the proposed designs perform better in terms of power consumption than the standard CMOS designs, and the other low power designs mentioned above.

Extent

128 p.

Comments

College of Engineering and Computer Science|FAU Electronic Theses and Dissertations Collection|Thesis (M.S.)--Florida Atlantic University, 2003.|College of Engineering and Computer Science

Identifier

FADT13017

Format

pdf

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