Author Type

Graduate Student

Date of Award

2007

Document Type

Thesis

Publication Status

Version of Record

Submission Date

October 2026

Thesis/Dissertation Advisor [Chair]

Shankar, Ravi

Abstract

Enhanced system design productivity is key to satisfying time-to-market demands. One will have to exploit design reuse methodology to meet project schedule requirements. Integration of components often fails due to various concurrency violations. Concurrency issues arise when components executing in parallel share resources and interact with each other. Such a system may have intermittent, yet catastrophic failures, if these concurrency issues are not addressed properly. In this thesis, we propose a methodology for developing concurrency compliant components from a requirement document. We have applied this methodology for developing process management and memory management aspects of a Real Time Operating System (RTOS). In this methodology, we start from a "customer' s" requirement document that is then mapped to activity diagram, swimlane diagram, class diagrams, and use case diagrams. To evolve a concurrency compliant design, we use the Message Sequence Chart plug-in for the Labeled Transition State Analyzer (LTSA). This plug-in lets us use Message Sequence Charts rather than coding in Finite State Processes (FSP). Later, we use MLDesigner to simulate our R TOS sub-system and demonstrate proper behavior of this sub-system.

Extent

79 p.

Comments

College of Engineering and Computer Science|Thesis (M.S.)--Florida Atlantic University, 2007.|FAU Electronic Theses and Dissertations Collection|College of Engineering and Computer Science

Identifier

FA00012528

Format

pdf

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