Author Type

Graduate Student

Date of Award

1997

Document Type

Thesis

Publication Status

Version of Record

Submission Date

October 2026

Thesis/Dissertation Advisor [Chair]

Mahgoub, Imad

Abstract

This research investigates memory latency of cluster-based cache-coherent multiprocessor systems with different interconnection topologies. We focus on a cluster-based architecture which is a variation of Stanford DASH architecture. The architecture, also, has some similarities with the STiNG architecture from Sequent Computer System Inc. In this architecture, a small number of processors and a portion of shared-memory are connected through a bus inside each cluster. As the number of processors per cluster is small, snoopy protocol is used inside each cluster. Each processor has two levels of caches and for each cluster a separate directory is maintained. Clusters are connected using directory-based scheme through an interconnection network to make the system scaleable. Trace-driven simulation has been developed to evaluate the overall memory latency of this architecture using three different network topologies, namely ring, mesh, and hypercube. For each network topology, the overall memory latency has been evaluated running a representative set of SPLASH-2 applications. Simulation results show that, the cluster-based multiprocessor system with hypercube topology outperforms those with mesh and ring topologies.

Extent

134 p.

Comments

College of Engineering and Computer Science|FAU Electronic Theses and Dissertations Collection|Thesis (M.S.)--Florida Atlantic University, 1997.|College of Engineering and Computer Science

Identifier

FADT15447

Format

pdf

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